Electronic system needs frequency signals with different frequencies so that it can be adapted to different operations or applications; considering the design and manufacturing cost, electronic systems often generate frequency signals with different frequencies according to the reference frequency signals.
Generally, when there is a fractional-multiple relationship between the frequency of the input signal and the frequency of the output signal, a multiphase frequency generator and a frequency combiner are used to generate the desired output signal. Reference is made to FIG. 1, which is a schematic diagram illustrating a multiphase frequency generator 10. The multiphase frequency generator 10 includes a phase generator 100, a multiplexer 102, an edge combiner 104 and a phase selector 106. The phase generator 100 is configured to receive an input signal CKIN to generate a plurality of phase signals; the multiplexer 102 selects a desired phase according to the indication of the phase selector 106 and delivers the desired phase to the edge combiner 104; the edge combiner 104 generates an output signal CKOUT according to the selected phase, and delivers the output signal CKOUT to the phase selector 106. It should be noted that when performing the fractional frequency division operation, more phase generating units are required in the phase generator 100 in order to improve the resolution of the plurality of phase signals, thereby resulting in additional power consumption; moreover, the mismatch among phase generating units also results in the increased noise of the output signal.
Further, reference is made to FIG. 2, which is a schematic diagram illustrating a frequency combiner 20. The frequency combiner 20 includes a frequency and phase detector 200, a charging pump 202, a low-pass filter 204, a voltage controlled oscillator 206, a programmable frequency divider 208 and a sigma-delta modulator 210. The frequency combiner 20 uses the sigma-delta modulator 210 to receive a frequency divided output frequency signal CKOUT to adjust the divisor of the programmable frequency divider 208. In this way, the average of the output frequency signals CKOUT generated by the frequency combiner 20 and reference frequency signal CKIN are in a fractional-division relationship. However, since the sigma-delta modulator 210 of the frequency combiner 20 would generate the quantization noise, one should reduce the loop bandwidth or enhance the resolution of the programmable frequency divider 208 to inhibit the quantization noise, wherein, reducing the loop bandwidth can be achieved by increasing the circuit area, whereas enhancing the resolution can be achieved by increasing the number of the output phase of the voltage controlled oscillator 206, thereby resulting in the generation of additional power consumptions.
Accordingly, there is a need to improve the status of art.